开始使用Arty的基本系统设计

本指南将提供一个在Vivado打开Arty Base System Design项目并在Xilinx SDK中入门的步骤。

At the end of this tutorial you will have:

• 在Xilinx Vivado打开了预制的微型硬件（HW）设计。

• Imported and implemented a custom DigiLEDs IP block into the design.

• Created .C Project in Xilinx Vivado SDK ( Software Development Kit) to interface with the Arty.

• Familiarity with Vivado
• 块设计经验

• Digilent Arty FPGA板
• 微型USB电缆
  • 用于UART通信和JTAG编程
• 可编程RGB LED（WS2812，NeoPixels）
  • 数据输入信号al wire connected to ARTY's JB1

• Xilinx Vivado 2015.3 or 2015.4 with the SDK package.
  • 遵循本Wiki指南（Installing Vivado) on how to install and activate Vivado

• Arty支持文件
  • These files will describeGPIO在板上的接口，使选择FPGA板并添加更容易GPIOIP块。
  • 遵循本Wiki指南（Vivado Board Files for Digilent 7-Series FPGA Boards）如何为Vivado安装板支持文件。

• Arty BSD教程文件： ZIP

The Arty Base System Design is a pre-made project that routes all of the necessary hardware on the Arty to the Microblaze processor to be used in Xilinx SDK. This allows the user to jump straight into software design in SDK.

在本教程中，我们将在基本系统设计中添加自己的自定义IP块，以与某些可编程RGB LED一起使用。

I. Vivado

• Open Vivado
• Execute the BSD tcl script to import the project
• 将数字自定义IP添加到项目的IP存储库中
• Add the DigiLEDs IP to the design and configure it.
• 验证并保存块设计
• 创建HDL系统包装器
• Run design Synthesis and Implementation
• Generate Bit File
• 导出硬件设计，包括生成的位流文件到SDK工具
• Launch SDK

现在，硬件设计导出到SDK工具。Vivado到SDK交接是通过Vivado内部完成的。我们将使用SDK创建一个软件应用程序，该应用程序将通过从Vivado导入硬件设计信息来使用自定义的板接口数据和FPGA硬件配置。

ii。SDK

• Create new application project and select Empty Application template
• 导入main.c
• Program FPGA

1.1) Download and extract the project files to a directory you will remember. We will used“ C：/工作”for this tutorial.

1.2) Open up Vivado and find the tcl Console on the bottom of the screen.

1.2）类型“cd C:/Work/BSD/proj”在TCL控制台中。This will move you to the folder that contains the tcl script that will generate the BSD project.

1.3) Type“来源./create_project”在TCL控制台中。这将自动生成BSD项目。

When it is done, you should see the Arty Base System Design shown below.

2.1) Find and click“Project Settings”在下面Project Manager on the left side of Vivado.

2.2）在项目设置中，单击左侧的“ IP”。然后单击“存储库管理器”选项卡，然后单击 +按钮（下面突出显示）。

2.3）导航到您的项目文件夹，然后选择“数字大师”文件夹。

2.4）验证新存储库是否在列表中，然后单击“确定”以退出项目设置。

3.1）单击“Add IP”按钮在下面突出显示。

3.2) Type “DigiLED” in the search box and double click“ digiled_v1.0”。这将使我们的自定义IP添加到块设计中。

3.3）单击“Run Connection Automation”然后单击“确定”以将IP连接到微封白开。

4.1）找到DigiLED_0块并双击块以自定义。

4.2）选择HSVBullet and change the Number of LEDs field to the number of LEDs on your RGB引领strip before clicking OK.

5.1）右键单击您的块设计，然后单击“创建端口”

5.2）将端口命名为“ LED_PIN”并将其设置为一个输出。单击确定。

5.3）使用光标将“ LED_PIN”连接到数字_0块上的“ LED_OUT”（看起来像铅笔）。

5.4）在块设计的左侧，选择Sourcestab, and open thepins.xdc在约束文件夹中文件。

5.5) Copy the line below, and paste it within pins.xdc. This is the pin connected to Connector JB1.

set_property -dict {package_pin e15 iostandard lvcmos33} [get_ports {led_pin}];＃io_l11p_t1_srcc_15 sch = jb_p [1]

5.6）保存销钉。xdc并关闭它。

6.1) Within theSources选项卡，单击“ system_wrapper-结构”并按DELETE。您也可以在它上正确，然后单击“从项目中删除文件”。选中该框，然后单击“确定”。

6.2）在弹出的下一个窗口中，单击“忽略并继续使用无效的顶部模块”，然后单击“确定”。

6.3）右键单击system.bdand click创建HDL包装器…

7.1) In the top toolbar, click生成bitstream。If you haven't already saved your design, you will get a prompt to save the block design.

7.2）生成了Bitstream后，屏幕上将弹出消息提示。您不必为此演示打开实施的设计。只需单击取消即可。

8.1）在窗口的左上角，从工具栏中单击File并选择Export Hardware。

This will export the hardware design with system wrapper for the Software Development Tool - Vivado SDK.

通过选中框，确保包含生成的bitstream。

9.1）去File并选择Launch SDKand click OK. The SDK file created local to the Vivado design project location will be launched. The hand-off to SDK from Vivado is complete.

10.1) A new window for SDK will open. The HW design specification and included IP blocks are displayed in thesystem.hdffile. SDK tool is independent of Vivado, i.e. from this point, you can create your SW project in C/C++ on top of the exported HW design. If necessary, you can also launch SDK directly from the SDK folder created in the main Vivado Project directory.

Now, if you need to go back to Vivado and make changes to the HW design, then it is recommended to close the SDK window and make the required HW design edits in Vivado. After this you must follow the sequence of creating a new HDL wrapper, save design and bit file generation. This new bit file and system wrapper must then be exported to SDK.

Since we do not have any HW design edits at this point, we will proceed with creating a software application.

10.2) On the left corner of the main SDK window, you will find theProject Explorer控制板。Notice that there is a main project folder under the namesystem_wrapper_hw_platform_0。

system是您在Vivado创建的块设计的名称。该硬件平台具有所有HW设计定义，已添加的IP接口，外部输出信号信息和本地内存地址信息。

假设您是否已关闭SDK，对现有硬件设计进行了编辑，并将设计导出到SDK，然后在启动SDK工具后，您会找到一个名为：：system_wrapper_hw_platform_1除了旧的HW设计，即system_wrapper_hw_platform_0。

11.1) Go toFilein the main tool bar and select新应用项目。A new project window will pop up.
给您的SDK项目一个没有空格的名称，例如“数字”。确保Target Hardware是正确的硬件设计。在我们的情况下，它将是“ System_wrapper_hw_platform_0”。点击下一步”。

11.2）选择Empty Application在下面可用模板在左面板上，单击完成。

11.3）完成上一步后，您将在该步骤中看到两个新文件夹Project Explorer控制板。

**DigiLEDs** which contains all the binaries, .C and .H (Header) files **DigiLEDs_bsp** which is the board support folder

DigiLEDsis our main working source folder. This also contains an important file shown here which is the “lscript.ld”. This is a Xilinx auto generated linker script file.

12.1) Navigate to your project files folder within the Work directory and find the “main.c” file.

12.2）单击并将此main.c文件拖动到DigiLEDs/srcfolder within Xilinx SDK. Choose to copy these source files into the project and click OK.

13.1）确保使用提供的Micro USB电缆打开ARTY并连接到主机PC。

在快速选择工具栏中，您将找到一个带有红色箭头和三个绿色方形盒的符号。

单击此符号以打开程序FPGA窗口。

确保硬件Platformis selected assystem_wrapper_hw_platform_0。

在软件配置框中，小精灵文件以在块中初始化内存列，行选项必须读取bootloop。如果没有,点击行和选择bootloop。

现在单击程序。

14.1) After the FPGA has been successfully programmed with the bit file, from theProject Explorerpanel, right click on the“DigiLEDs”project folder. Go to“Run As”并选择“在硬件（系统调试器）上启动”



然后，您的Arty将启动Digileds演示。按下按钮0将循环浏览RGB上的三个模式引领跳闸。

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