Nexys VGA Reference Manual

Digilent Nexys VGA模块提供了一个12位VGA接口，可与Digilent Nexys板一起使用。12位接口允许在标准VGA监视器上显示的最多4096颜色。

在下VGA模块接口与在下蟒蛇rd via the 16 pin header at J8 and connects to a VGA monitor using a standard 15 pin VGA cable.

The five standard VGA signals Red, Green, Blue, Horizontal Sync (HS), and Vertical Sync (VS) are routed directly from the FPGA to the VGA connector. There are four signals routed from the FPGA for each of the standard VGA color signals resulting in a video system that can produce 4,096 colors. Each of these signals has a series resistor that when combined in the circuit, form a divider with the 75-ohm termination resistance of the VGA display. These simple circuits ensure that the video signals cannot exceed the VGA-specified maximum voltage, and result in color signals that are either fully on (.7V), fully off (0V) or somewhere in between.

VGA信号时间由VESA组织（www.vesa.org）指定，发布，版权和版权。提供以下VGA系统的定时信息，作为如何以640 x 480模式驱动VGA监视器的示例。有关更精确的信息或有关较高VGA频率的信息，请参阅VESA网站上的文档。

基于CRT的VGA显示使用振幅调节的移动电子束（或阴极射线）在磷光器涂层屏幕上显示信息。LCD显示器使用一系列开关，这些开关可以在少量液晶上施加电压，从而在像素的基础上通过像素的晶体通过晶体改变了光介电常数。尽管以下描述仅限于CRT显示，但LCD显示器已经演变为使用与CRT显示相同的信号正时（因此，下面的“信号”讨论与CRT和LCD有关）。彩色CRT显示器使用三个电子束（一根用于红色，一根用于蓝色，一个用于绿色），以供应覆盖阴极射线管的显示端的磷光器（请参阅图表）。电子梁从“电子枪”中散发出来，它们是靠近一个称为“网格”的正带环形环形板的细点加热阴极。网格施加的静电力是从阴极中拉出通电电子的射线，这些光线由流入阴极的电流馈入。这些颗粒射线最初被加速到网格，但它们很快属于较大的静电力的影响，这是由CRT的整个镀膜涂层的表面产生的，被充电至20kV（或更多）。当射线通过网格的中心时，将射线聚焦在细束上，然后加速以影响磷光器涂层的显示面。磷光度表面在冲击点发光，并在去除光束后继续发光数百微秒。馈入阴极的电流越大，磷光器会发光的明亮。

Between the grid and the display surface, the beam passes through the neck of the CRT where two coils of wire produce orthogonal electromagnetic fields. Because cathode rays are composed of charged particles (electrons), they can be deflected by these magnetic fields. Current waveforms are passed through the coils to produce magnetic fields that interact with the cathode rays and cause them to transverse the display surface in a “raster” pattern, horizontally from left to right and vertically from top to bottom. As the cathode ray moves over the surface of the display, the current sent to the electron guns can be increased or decreased to change the brightness of the display at the cathode ray impact point.

Information is only displayed when the beam is moving in the “forward” direction (left to right and top to bottom), and not during the time the beam is reset back to the left or top edge of the display. Much of the potential display time is therefore lost in “blanking” periods when the beam is reset and stabilized to begin a new horizontal or vertical display pass. The size of the beams, the frequency at which the beam can be traced across the display, and the frequency at which the electron beam can be modulated determine the display resolution. Modern VGA displays can accommodate different resolutions, and a VGA controller circuit dictates the resolution by producing timing signals to control the raster patterns. The controller must produce synchronizing pulses at 3.3V (or 5V) to set the frequency at which current flows through the deflection coils, and it must ensure that video data is applied to the electron guns at the correct time. Raster video displays define a number of “rows” that corresponds to the number of horizontal passes the cathode makes over the display area, and a number of “columns” that corresponds to an area on each row that is assigned to one “picture element” or pixel. Typical displays use from 240 to 1200 rows and from 320 to 1600 columns. The overall size of a display and the number of rows and columns determines the size of each pixel.

Video data typically comes from a video refresh memory, with one or more bytes assigned to each pixel location (the Basys uses three bits per pixel). The controller must index into video memory as the beams move across the display, and retrieve and apply video data to the display at precisely the time the electron beam is moving across a given pixel.

VGA控制器电路必须生成HS和VS VS信号，并根据像素时钟协调视频数据的传递。像素时钟定义了显示一个信息像素的可用时间。VS信号定义了显示的“刷新”频率，或者显示显示上所有信息的频率。最小刷新频率是显示器的磷光和电子束强度的函数，实际的刷新频率落在50Hz至120Hz范围内。要在给定的刷新频率下显示的线数定义了水平的“回溯”频率。对于使用25MHz像素时钟和60 +/- 1Hz刷新的640像素乘480线显示器，可以得出下表中显示的信号正时。同步脉冲宽度以及前后门廊间隔的时间安排（门廊间隔是在不能显示信息的前后脉冲时间）基于从实际的VGA显示器中获取的观察结果。

A VGA controller circuit decodes the output of a horizontal-sync counter driven by the pixel clock to generate HS signal timings. This counter can be used to locate any pixel location on a given row.

同样，可以使用每个HS脉冲进行增量的垂直同步计数器的输出来生成信号正时，并且该计数器可用于定位任何给定的行。这两个不断运行的计数器可用于将地址形成视频内存. No time relationship between the onset of the HS pulse and the onset of the VS pulse is specified, so the designer can arrange the counters to easily form video内存地址，或最小化对同步脉冲生成的解码逻辑。